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authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-06-23 22:03:01 +0200
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>2024-06-25 19:56:08 +0300
commitc808ece19640e02fe86ac073c0119d583473dfc0 (patch)
tree5b379e4f6b16cbdeee0e5c8f9624c6efb42ecca3 /Documentation/devicetree/bindings/display/msm/gpu.yaml
parentd6c7c411be788d1cf78a4fdec3ce080a8f2e39e1 (diff)
dt-bindings: display/msm/gpu: define reg-names in top-level
All devices should (and actually do) have same order of entries, if possible. That's the case for reg/reg-names, so define the reg-names in top-level to enforce that. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/600510/ Link: https://lore.kernel.org/r/20240623-qcom-adreno-dts-bindings-driver-v2-2-9496410de992@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/display/msm/gpu.yaml')
-rw-r--r--Documentation/devicetree/bindings/display/msm/gpu.yaml5
1 files changed, 4 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml
index 253e68d92779..baea1946c65d 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml
@@ -46,7 +46,10 @@ properties:
reg-names:
minItems: 1
- maxItems: 3
+ items:
+ - const: kgsl_3d0_reg_memory
+ - const: cx_mem
+ - const: cx_dbgc
interrupts:
maxItems: 1