aboutsummaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/clock/dove-divider-clock.txt
diff options
context:
space:
mode:
authorMike Marshall <hubcap@omnibond.com>2016-03-14 15:39:42 -0400
committerMike Marshall <hubcap@omnibond.com>2016-03-14 15:39:42 -0400
commitab6652524aaf834d5dcdb46dd7695813b8d63da5 (patch)
treebb3876a9b61254be902416f7dbf578deb28e9f22 /Documentation/devicetree/bindings/clock/dove-divider-clock.txt
parentacfcbaf1925f2dc5c46c61de69d756dec92a2ff8 (diff)
parentb562e44f507e863c6792946e4e1b1449fbbac85d (diff)
Orangefs: merge to v4.5
Merge tag 'v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into current Linux 4.5
Diffstat (limited to 'Documentation/devicetree/bindings/clock/dove-divider-clock.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/dove-divider-clock.txt28
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/dove-divider-clock.txt b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt
new file mode 100644
index 000000000000..e3eb0f657c5e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/dove-divider-clock.txt
@@ -0,0 +1,28 @@
+PLL divider based Dove clocks
+
+Marvell Dove has a 2GHz PLL, which feeds into a set of dividers to provide
+high speed clocks for a number of peripherals. These dividers are part of
+the PMU, and thus this node should be a child of the PMU node.
+
+The following clocks are provided:
+
+ID Clock
+-------------
+0 AXI bus clock
+1 GPU clock
+2 VMeta clock
+3 LCD clock
+
+Required properties:
+- compatible : shall be "marvell,dove-divider-clock"
+- reg : shall be the register address of the Core PLL and Clock Divider
+ Control 0 register. This will cover that register, as well as the
+ Core PLL and Clock Divider Control 1 register. Thus, it will have
+ a size of 8.
+- #clock-cells : from common clock binding; shall be set to 1
+
+divider_clk: core-clock@0064 {
+ compatible = "marvell,dove-divider-clock";
+ reg = <0x0064 0x8>;
+ #clock-cells = <1>;
+};