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| author | Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> | 2024-08-01 16:41:41 +0530 |
|---|---|---|
| committer | Joonas Lahtinen <joonas.lahtinen@linux.intel.com> | 2024-08-05 12:41:14 +0300 |
| commit | 1b85bdb0fadb42f5ef75ddcd259fc1ef13ec04de (patch) | |
| tree | 78962ce49f4788614b19735940c9d9fdb4723ba0 /Documentation/cpu-freq/cpu-drivers.rst | |
| parent | de9c2c66ad8e787abec7c9d7eff4f8c3cdd28aed (diff) | |
drm/i915/display: correct dual pps handling for MTL_PCH+
On the PCH side the second PPS was introduced in ICP+.Add condition
On MTL_PCH and greater platform also having the second PPS.
Note that DG1/2 south block only has the single PPS, so need
to exclude the fake DG1/2 PCHs
Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11488
Fixes: 93cbc1accbce ("drm/i915/mtl: Add fake PCH for Meteor Lake")
Cc: <stable@vger.kernel.org> # v6.9+
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240801111141.574854-1-dnyaneshwar.bhadane@intel.com
(cherry picked from commit da1878b61c8d480c361ba6a39ce8a31c80b65826)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'Documentation/cpu-freq/cpu-drivers.rst')
0 files changed, 0 insertions, 0 deletions