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authorBryan O'Donoghue <bryan.odonoghue@linaro.org>2022-11-17 00:32:31 +0000
committerBjorn Andersson <andersson@kernel.org>2022-12-06 11:05:31 -0600
commit3c5aa4c758dd4a41119158dff2ab358b9b5cd520 (patch)
tree8ef6227bcad79cfc437c048afc9c09af4aa08baa /Documentation/conf.py
parent64cb4a44720143a94a261ce2b3098498d6dc84d6 (diff)
arm64: dts: qcom: sm8250: camss: Define ports and ports address/size cells
Define the set of possible ports, one for each CSI PHY along with the port address and size cells @ the SoC dtsi level. Suggested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221117003232.589734-7-bryan.odonoghue@linaro.org
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