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| author | Remington Brasga <rbrasga@uci.edu> | 2024-04-29 22:55:27 +0000 |
|---|---|---|
| committer | Jonathan Corbet <corbet@lwn.net> | 2024-05-02 10:02:29 -0600 |
| commit | da51bbcdbace8f43adf6066934c3926b656376e5 (patch) | |
| tree | 0ef923a8a2aba086a10fec6ccc413fa7e860dc44 /Documentation/arch/m68k | |
| parent | d43ddd5c91802a46354fa4c4381416ef760676e2 (diff) | |
Docs: typos/spelling
Fix spelling and grammar in Docs descriptions
Signed-off-by: Remington Brasga <rbrasga@uci.edu>
Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Link: https://lore.kernel.org/r/20240429225527.2329-1-rbrasga@uci.edu
Diffstat (limited to 'Documentation/arch/m68k')
| -rw-r--r-- | Documentation/arch/m68k/buddha-driver.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arch/m68k/buddha-driver.rst b/Documentation/arch/m68k/buddha-driver.rst index 20e401413991..5d1bc824978b 100644 --- a/Documentation/arch/m68k/buddha-driver.rst +++ b/Documentation/arch/m68k/buddha-driver.rst @@ -173,7 +173,7 @@ When accessing IDE registers with A6=1 (for example $84x), the timing will always be mode 0 8-bit compatible, no matter what you have selected in the speed register: -781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive. +781ns select, IOR/IOW after 4 clock cycles (=314ns) active. All the timings with a very short select-signal (the 355ns fast accesses) depend on the accelerator card used in the |