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authorPhilipp Hortmann <[email protected]>2023-03-25 09:35:13 +0100
committerGreg Kroah-Hartman <[email protected]>2023-03-25 09:52:09 +0100
commitfe730bfda640bc7b64f458bb35007225b640bcb0 (patch)
tree6912efd1f0be2781888ec53def062937e8dd21e4
parent6e1ce577876250dbbfa95caaad9e51826f452166 (diff)
staging: rtl8192e: Remove priv->rf_chip in _rtl92e_phy_rf_read
priv->rf_chip is initialized to RF_8256 and never changed. Remove conditions in function _rtl92e_phy_rf_read as those are dead code. Signed-off-by: Philipp Hortmann <[email protected]> Link: https://lore.kernel.org/r/c3b2e2a41cc450c1cb9ac41b8ed19b090d9627a6.1679732276.git.philipp.g.hortmann@gmail.com Signed-off-by: Greg Kroah-Hartman <[email protected]>
-rw-r--r--drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c43
1 files changed, 18 insertions, 25 deletions
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index 2dbddf4ae3d6..c4fd412cf3d6 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -82,24 +82,20 @@ static u32 _rtl92e_phy_rf_read(struct net_device *dev,
Offset &= 0x3f;
- if (priv->rf_chip == RF_8256) {
- rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
- if (Offset >= 31) {
- priv->rf_reg_0value[eRFPath] |= 0x140;
- rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
- bMaskDWord,
- (priv->rf_reg_0value[eRFPath] << 16));
- NewOffset = Offset - 30;
- } else if (Offset >= 16) {
- priv->rf_reg_0value[eRFPath] |= 0x100;
- priv->rf_reg_0value[eRFPath] &= (~0x40);
- rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
- bMaskDWord,
- (priv->rf_reg_0value[eRFPath] << 16));
-
- NewOffset = Offset - 15;
- } else
- NewOffset = Offset;
+ rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);
+ if (Offset >= 31) {
+ priv->rf_reg_0value[eRFPath] |= 0x140;
+ rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
+ bMaskDWord,
+ (priv->rf_reg_0value[eRFPath] << 16));
+ NewOffset = Offset - 30;
+ } else if (Offset >= 16) {
+ priv->rf_reg_0value[eRFPath] |= 0x100;
+ priv->rf_reg_0value[eRFPath] &= (~0x40);
+ rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset,
+ bMaskDWord,
+ (priv->rf_reg_0value[eRFPath] << 16));
+ NewOffset = Offset - 15;
} else {
NewOffset = Offset;
}
@@ -113,15 +109,12 @@ static u32 _rtl92e_phy_rf_read(struct net_device *dev,
ret = rtl92e_get_bb_reg(dev, pPhyReg->rfLSSIReadBack,
bLSSIReadBackData);
- if (priv->rf_chip == RF_8256) {
- priv->rf_reg_0value[eRFPath] &= 0xebf;
-
- rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
- (priv->rf_reg_0value[eRFPath] << 16));
+ priv->rf_reg_0value[eRFPath] &= 0xebf;
- rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
- }
+ rtl92e_set_bb_reg(dev, pPhyReg->rf3wireOffset, bMaskDWord,
+ (priv->rf_reg_0value[eRFPath] << 16));
+ rtl92e_set_bb_reg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);
return ret;