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authorClaudiu Beznea <[email protected]>2023-10-10 16:26:56 +0300
committerGeert Uytterhoeven <[email protected]>2023-10-12 20:05:36 +0200
commitfd627207aaa782c1fd4224076b56a03a1059f516 (patch)
treea3e1913d6fabc8aa2789bba0bcbf25a55967e57e
parentde60a3ebe410670ffdbbc95faa25a820da44ab11 (diff)
clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R()
Use the %x format specifier to print CLK_ON_R(). This makes debugging easier as the value printed will be hexadecimal like in the hardware manual. Along with it add "0x" in front of the printed value. Signed-off-by: Claudiu Beznea <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
-rw-r--r--drivers/clk/renesas/rzg2l-cpg.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index d62f1bc1f60e..764bd72cf059 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable)
return 0;
}
- dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk,
+ dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk,
enable ? "ON" : "OFF");
value = bitmask << 16;