diff options
| author | Shengjiu Wang <[email protected]> | 2024-07-29 09:39:58 +0800 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-08-13 10:48:01 +0800 |
| commit | fcfa86b3e02c565339c98108ef34d2ed7c36ff9f (patch) | |
| tree | 02b3d08e385f4093cec001394c96d73feff7f3a2 | |
| parent | 198aa4706cc7498e099b3379ea0a1ad1fbda9520 (diff) | |
arm64: dts: imx93-11x11-evk: Add PDM microphone sound card support
Add PDM micphone sound card support, configure the pinmux.
This sound card supports recording sound from PDM microphone
and convert the PDM format data to PCM data.
Signed-off-by: Shengjiu Wang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts index b2e298dc9067..2273d318310f 100644 --- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts @@ -104,6 +104,20 @@ sound-dai = <&bt_sco_codec 1>; }; }; + + sound-micfil { + compatible = "fsl,imx-audio-card"; + model = "micfil-audio"; + + pri-dai-link { + link-name = "micfil hifi"; + format = "i2s"; + + cpu { + sound-dai = <&micfil>; + }; + }; + }; }; &adc1 { @@ -357,6 +371,16 @@ status = "okay"; }; +&micfil { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_pdm>; + pinctrl-1 = <&pinctrl_pdm_sleep>; + assigned-clocks = <&clk IMX93_CLK_PDM>; + assigned-clock-parents = <&clk IMX93_CLK_AUDIO_PLL>; + assigned-clock-rates = <49152000>; + status = "okay"; +}; + &mu1 { status = "okay"; }; @@ -559,6 +583,22 @@ >; }; + pinctrl_pdm: pdmgrp { + fsl,pins = < + MX93_PAD_PDM_CLK__PDM_CLK 0x31e + MX93_PAD_PDM_BIT_STREAM0__PDM_BIT_STREAM00 0x31e + MX93_PAD_PDM_BIT_STREAM1__PDM_BIT_STREAM01 0x31e + >; + }; + + pinctrl_pdm_sleep: pdmsleepgrp { + fsl,pins = < + MX93_PAD_PDM_CLK__GPIO1_IO08 0x31e + MX93_PAD_PDM_BIT_STREAM0__GPIO1_IO09 0x31e + MX93_PAD_PDM_BIT_STREAM1__GPIO1_IO10 0x31e + >; + }; + pinctrl_sai1: sai1grp { fsl,pins = < MX93_PAD_SAI1_TXC__SAI1_TX_BCLK 0x31e |