diff options
| author | Francois Dugast <francois.dugast@intel.com> | 2023-05-31 15:23:35 +0000 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2023-12-19 18:35:20 -0500 |
| commit | fcca94c69b9539ed741ba5875ab4f1157cd781f8 (patch) | |
| tree | b4da251676dee7aad48cbc622c2bc602a85fc0b8 | |
| parent | a4f08dbb712135680d086ffa9e8ee5c07e5fc661 (diff) | |
drm/xe: Group engine related structs
Move the definition of drm_xe_engine_class_instance to group it with
other engine related structs and to follow the ioctls order.
Reported-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
| -rw-r--r-- | include/uapi/drm/xe_drm.h | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/include/uapi/drm/xe_drm.h b/include/uapi/drm/xe_drm.h index 4266760faf05..7d317b9564e9 100644 --- a/include/uapi/drm/xe_drm.h +++ b/include/uapi/drm/xe_drm.h @@ -116,24 +116,6 @@ struct xe_user_extension { #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) #define DRM_IOCTL_XE_VM_MADVISE DRM_IOW( DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise) -struct drm_xe_engine_class_instance { - __u16 engine_class; - -#define DRM_XE_ENGINE_CLASS_RENDER 0 -#define DRM_XE_ENGINE_CLASS_COPY 1 -#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2 -#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3 -#define DRM_XE_ENGINE_CLASS_COMPUTE 4 - /* - * Kernel only class (not actual hardware engine class). Used for - * creating ordered queues of VM bind operations. - */ -#define DRM_XE_ENGINE_CLASS_VM_BIND 5 - - __u16 engine_instance; - __u16 gt_id; -}; - #define XE_MEM_REGION_CLASS_SYSMEM 0 #define XE_MEM_REGION_CLASS_VRAM 1 @@ -536,6 +518,24 @@ struct drm_xe_engine_set_property { __u64 reserved[2]; }; +struct drm_xe_engine_class_instance { + __u16 engine_class; + +#define DRM_XE_ENGINE_CLASS_RENDER 0 +#define DRM_XE_ENGINE_CLASS_COPY 1 +#define DRM_XE_ENGINE_CLASS_VIDEO_DECODE 2 +#define DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE 3 +#define DRM_XE_ENGINE_CLASS_COMPUTE 4 + /* + * Kernel only class (not actual hardware engine class). Used for + * creating ordered queues of VM bind operations. + */ +#define DRM_XE_ENGINE_CLASS_VM_BIND 5 + + __u16 engine_instance; + __u16 gt_id; +}; + struct drm_xe_engine_create { /** @extensions: Pointer to the first extension struct, if any */ #define XE_ENGINE_EXTENSION_SET_PROPERTY 0 |