diff options
| author | Michal Simek <[email protected]> | 2023-11-23 08:02:28 +0100 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2023-12-13 16:52:47 +0100 |
| commit | fc622c97d3e290437bb48d2fcb0987dd73234b90 (patch) | |
| tree | 82b6a844ce244dfa56cb584d8ea273d3310137ce | |
| parent | 6f3ecaea6324e77ad9d8f4a27345f59f47b5025f (diff) | |
dt-bindings: soc: Add new board description for MicroBlaze V
MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP.
It is hardware compatible with classic MicroBlaze processor. Processor can
be used with standard AMD/Xilinx IPs including interrupt controller and
timer.
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml index 95758deca325..d4c0fe1fe435 100644 --- a/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml +++ b/Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml @@ -132,6 +132,11 @@ properties: - const: xlnx,zynqmp-smk-k26 - const: xlnx,zynqmp + - description: AMD MicroBlaze V (QEMU) + items: + - const: qemu,mbv + - const: amd,mbv + additionalProperties: true ... |