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| author | Wenbin Mei <[email protected]> | 2021-09-17 20:48:01 +0800 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2021-10-12 10:21:18 +0200 |
| commit | fb4708e6cb5c70a0dca5437640f1f85b9042256e (patch) | |
| tree | 959b1e1153c7c15868873c6133ff5ea14ebe5304 | |
| parent | bc9fd32c294f4728663fac2dd82ecd0cfcba7ba9 (diff) | |
dt-bindings: mmc: mtk-sd: Add hs400 dly3 setting
Add hs400 dly3 setting for mtk-sd yaml
Signed-off-by: Wenbin Mei <[email protected]>
Acked-by: Rob Herring <[email protected]>
Reviewed-by: Linus Walleij <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Ulf Hansson <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml index e866e985549e..82768a807294 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -119,6 +119,18 @@ properties: If present, HS400 command responses are sampled on rising edges. If not present, HS400 command responses are sampled on falling edges. + mediatek,hs400-ds-dly3: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Gear of the third delay line for DS for input data latch in data + pad macro, there are 32 stages from 0 to 31. + For different corner IC, the time is different about one step, it is + about 100ps. + The value is confirmed by doing scan and calibration to find a best + value with corner IC and it is valid only for HS400 mode. + minimum: 0 + maximum: 31 + mediatek,latch-ck: $ref: /schemas/types.yaml#/definitions/uint32 description: |