diff options
| author | Damien Le Moal <[email protected]> | 2021-06-22 15:45:02 +0900 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2021-06-30 11:34:36 -0700 |
| commit | faa0e307948594b4379a86fff7fb2409067aed6f (patch) | |
| tree | bf91ae414498d4bffc1092065a8aff1cdaeaba5b | |
| parent | 2cdee50eda9d87f4fabba3df00caa4cc873f30ab (diff) | |
clk: k210: Fix k210_clk_set_parent()
In k210_clk_set_parent(), add missing writel() call to update the mux
register of a clock to change its parent. This also fixes a compilation
warning with clang when compiling with W=1.
Fixes: c6ca7616f7d5 ("clk: Add RISC-V Canaan Kendryte K210 clock driver")
Cc: [email protected]
Signed-off-by: Damien Le Moal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/clk-k210.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/clk-k210.c b/drivers/clk/clk-k210.c index 6c84abf5b2e3..67a7cb3503c3 100644 --- a/drivers/clk/clk-k210.c +++ b/drivers/clk/clk-k210.c @@ -722,6 +722,7 @@ static int k210_clk_set_parent(struct clk_hw *hw, u8 index) reg |= BIT(cfg->mux_bit); else reg &= ~BIT(cfg->mux_bit); + writel(reg, ksc->regs + cfg->mux_reg); spin_unlock_irqrestore(&ksc->clk_lock, flags); return 0; |