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authorJack Xiao <[email protected]>2024-05-21 15:28:17 +0800
committerAlex Deucher <[email protected]>2024-05-23 15:09:42 -0400
commitfa1040811678afc0fad043d7be1de252de74a035 (patch)
treed07bb11ea7192f16fec041719a3feace607313e4
parent64da71ea76418550aafd85740dfde074c99a3a6c (diff)
drm/amdgpu/mes12: mes hw_fini fix for mode1 reset
Port mes11 hw_fini to mes12, fix for mode1 reset. Signed-off-by: Jack Xiao <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/mes_v12_0.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index 45b70a4c4ada..f18fdda023c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
@@ -1380,11 +1380,12 @@ failure:
static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev)
{
- if (!adev->enable_uni_mes && adev->mes.ring.sched.ready)
+ if (adev->mes.ring.sched.ready) {
mes_v12_0_kiq_dequeue_sched(adev);
+ adev->mes.ring.sched.ready = false;
+ }
- if (!amdgpu_sriov_vf(adev))
- mes_v12_0_enable(adev, false);
+ mes_v12_0_enable(adev, false);
return 0;
}