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authorRussell King (Oracle) <[email protected]>2021-10-20 16:50:13 +0100
committerShawn Guo <[email protected]>2021-11-21 10:38:45 +0800
commitf9d3b807daa69728e59a5171e8e7b40cfa848383 (patch)
treec570eda73afd0f2110a6bf42233428b3b640f57c
parentfa55b7dcdc43c1aa1ba12bca9d2dd4318c2a0dbf (diff)
ARM: dts: vf610-zii-dev-rev-b: correct phy-mode for 6185 dsa link
DT currently lists the port mode for the 88E6352 switch 1 to 88E6185 switch 2 as "rgmii-id" but referring to the schematics, it is in fact a serdes link. The 88E6352 is configured with P5_MODE=6, S_SEL=1 and S_MODE=1, which means port 5 is configured as 1000BASE-X. This is confirmed by the value in the 88E6352 port 5 status register, 0x4e09, where C_MODE=9 meaning 1000BASE-X. It is also confirmed by the 88E6185 port 9 status register, 0x5e8c, where C_MODE=4 meaning cross-chip SERDES mode is selected. Signed-off-by: Russell King (Oracle) <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r--arch/arm/boot/dts/vf610-zii-dev-rev-b.dts4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
index 043ddd70372f..80698e98dafe 100644
--- a/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
+++ b/arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
@@ -149,7 +149,7 @@
reg = <5>;
label = "dsa";
link = <&switch2port9>;
- phy-mode = "rgmii-txid";
+ phy-mode = "1000base-x";
fixed-link {
speed = <1000>;
@@ -252,7 +252,7 @@
switch2port9: port@9 {
reg = <9>;
label = "dsa";
- phy-mode = "rgmii-txid";
+ phy-mode = "1000base-x";
link = <&switch1port5
&switch0port5>;