diff options
| author | Charlene Liu <[email protected]> | 2021-11-08 16:04:45 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-11-22 14:59:13 -0500 |
| commit | f8fb5cd412e31d6277c5b0107bb37d677107cbc0 (patch) | |
| tree | 1513b17508c7068fa85c6f8ce3680644a25e8417 | |
| parent | 524a0ba6fab955b14d4ae9a15edbb853e9cad426 (diff) | |
drm/amd/display: based on flag reset z10 function pointer
[Why & How]
Per hardware requirements, add a flag to control
z10 enable/disable.
Reviewed-by: Sung joon Kim <[email protected]>
Acked-by: Qingqing Zhuo <[email protected]>
Signed-off-by: Charlene Liu <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c index 05335a8c3c2d..e175b6cc0125 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c @@ -149,4 +149,9 @@ void dcn31_hw_sequencer_construct(struct dc *dc) dc->hwss.init_hw = dcn20_fpga_init_hw; dc->hwseq->funcs.init_pipes = NULL; } + if (dc->debug.disable_z10) { + /*hw not support z10 or sw disable it*/ + dc->hwss.z10_restore = NULL; + dc->hwss.z10_save_init = NULL; + } } |