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authorBiju Das <[email protected]>2024-07-02 19:00:15 +0100
committerPhilipp Zabel <[email protected]>2024-07-03 10:51:53 +0200
commitf64f2d6fdda459b10bc8f774ed87e9980a5021e5 (patch)
tree3c2b9912e84cbdf365b1f528cd9df5083425a377
parent197c22b65ea6a70eb377760282e7a634c3a812ab (diff)
dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document USB VBUS regulator
The VBUS enable can be controlled by the VBOUT bit of the VBUS control register. This register is part of usbphy-ctrl IP. Document the USB VBUS regulator object. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Philipp Zabel <[email protected]>
-rw-r--r--Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml10
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
index 03c18611e42d..b0b20af15313 100644
--- a/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
+++ b/Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
@@ -42,6 +42,12 @@ properties:
0 = Port 1 Phy reset
1 = Port 2 Phy reset
+ regulator-vbus:
+ type: object
+ description: USB VBUS regulator
+ $ref: /schemas/regulator/regulator.yaml#
+ unevaluatedProperties: false
+
required:
- compatible
- reg
@@ -49,6 +55,7 @@ required:
- resets
- power-domains
- '#reset-cells'
+ - regulator-vbus
additionalProperties: false
@@ -64,4 +71,7 @@ examples:
resets = <&cpg R9A07G044_USB_PRESETN>;
power-domains = <&cpg>;
#reset-cells = <1>;
+ regulator-vbus {
+ regulator-name = "vbus";
+ };
};