diff options
| author | Stephen Chen <[email protected]> | 2023-07-31 16:05:16 +0530 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2023-08-10 22:41:55 +0200 |
| commit | f544630dc4967fc58cc995d0d2dd3940d9848c39 (patch) | |
| tree | 935eeb8c0819b4f153f922bbf18981cf4c83e846 | |
| parent | 012f90c31babdbd94f3e7bc80400f3d4ae5035bf (diff) | |
ARM: dts: rockchip: Enable SFC for edgeble-neu2
Enable on module SPI Flash present in Edgeble Neu2.
Tested-by: Jagan Teki <[email protected]>
Signed-off-by: Stephen Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi index e3e5752fd6b7..6bbaf6da6545 100644 --- a/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi +++ b/arch/arm/boot/dts/rockchip/rv1126-edgeble-neu2.dtsi @@ -301,6 +301,22 @@ status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspi_pins>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &sdio { bus-width = <4>; cap-sd-highspeed; |