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| author | Yang Xiwen <[email protected]> | 2024-02-21 19:56:42 +0800 |
|---|---|---|
| committer | Wim Van Sebroeck <[email protected]> | 2024-03-03 14:17:31 +0100 |
| commit | f4c53582530991fe5dedd124932cf06b955a0b8a (patch) | |
| tree | 68f88fa8f495b5af6275001050e1c9793879d2d7 | |
| parent | 575f100c1cce1486f581baefa97dde15b48728c7 (diff) | |
dt-bindings: watchdog: arm,sp805: document the reset signal
The reset signal needs to be deasserted before operation of sp805
module. Document in the binding.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Yang Xiwen <[email protected]>
Reviewed-by: Guenter Roeck <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Guenter Roeck <[email protected]>
Signed-off-by: Wim Van Sebroeck <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/watchdog/arm,sp805.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml index 7aea255b301b..bd7c09ed1938 100644 --- a/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml +++ b/Documentation/devicetree/bindings/watchdog/arm,sp805.yaml @@ -50,6 +50,10 @@ properties: - const: wdog_clk - const: apb_pclk + resets: + maxItems: 1 + description: WDOGRESn input reset signal for sp805 module. + required: - compatible - reg @@ -67,4 +71,5 @@ examples: interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; clocks = <&wdt_clk>, <&apb_pclk>; clock-names = "wdog_clk", "apb_pclk"; + resets = <&wdt_rst>; }; |