diff options
| author | Alim Akhtar <[email protected]> | 2022-02-21 23:15:46 +0530 |
|---|---|---|
| committer | Daniel Lezcano <[email protected]> | 2022-03-07 18:27:22 +0100 |
| commit | f49b82a0a54fa85451ed96c35f24679522d59c7a (patch) | |
| tree | ccae1bbf3fcebb214a0dc5d12d925d106bb706d6 | |
| parent | dfc597c9bca9b4447820a59fe86526f016be1458 (diff) | |
clocksource/drivers/exynos_mct: Bump up mct max irq number
Bump-up maximum number of MCT IRQ to match the binding
documentation. This make driver scalable for SoC which
has more than 12 timer irqs, like recently added FSD SoC.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Alim Akhtar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Daniel Lezcano <[email protected]>
| -rw-r--r-- | drivers/clocksource/exynos_mct.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 341ee47ba35b..bcf21006ebd8 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -64,7 +64,8 @@ #define MCT_G0_IRQ 0 /* Local timers count starts after global timer count */ #define MCT_L0_IRQ 4 -#define MCT_NR_IRQS 12 +/* Max number of IRQ as per DT binding document */ +#define MCT_NR_IRQS 20 enum { MCT_INT_SPI, |