aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRick Wertenbroek <[email protected]>2023-04-18 09:46:50 +0200
committerLorenzo Pieralisi <[email protected]>2023-06-22 09:36:51 +0200
commitf397fd4ac1fa3afcabd8cee030f953ccaed2a364 (patch)
treef7718571d382ddde6c45cfb56092e299e05395c4
parent1f1c42ece18de365c976a060f3c8eb481b038e3a (diff)
PCI: rockchip: Assert PCI Configuration Enable bit after probe
Assert PCI Configuration Enable bit after probe. When this bit is left to 0 in the endpoint mode, the RK3399 PCIe endpoint core will generate configuration request retry status (CRS) messages back to the root complex. Assert this bit after probe to allow the RK3399 PCIe endpoint core to reply to configuration requests from the root complex. This is documented in section 17.5.8.1.2 of the RK3399 TRM. Link: https://lore.kernel.org/r/[email protected] Fixes: cf590b078391 ("PCI: rockchip: Add EP driver for Rockchip PCIe controller") Tested-by: Damien Le Moal <[email protected]> Signed-off-by: Rick Wertenbroek <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Damien Le Moal <[email protected]> Cc: [email protected]
-rw-r--r--drivers/pci/controller/pcie-rockchip-ep.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index 9b835377bd9e..d00baed65eba 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -623,6 +623,9 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev)
ep->irq_pci_addr = ROCKCHIP_PCIE_EP_DUMMY_IRQ_ADDR;
+ rockchip_pcie_write(rockchip, PCIE_CLIENT_CONF_ENABLE,
+ PCIE_CLIENT_CONFIG);
+
return 0;
err_epc_mem_exit:
pci_epc_mem_exit(epc);