diff options
author | Colin Ian King <[email protected]> | 2016-03-29 17:53:23 +0100 |
---|---|---|
committer | Greg Kroah-Hartman <[email protected]> | 2016-03-29 14:41:15 -0700 |
commit | f0e00da2db61c9052fbc07edf2b2bf615b7a4bbe (patch) | |
tree | ced7a8f3a823d6246a9e25a9e3cb2de317ace57b | |
parent | 7d47383dcb3f5867de56ac04ce46db06ac47ad0b (diff) |
staging: sm750fb: initialize max_d to maximum D value of 6
max_d is not initialized and should be set to the largest D
value of 6.
Signed-off-by: Colin Ian King <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
-rw-r--r-- | drivers/staging/sm750fb/ddk750_chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 95f7cae3cc23..f80ee776677f 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -306,7 +306,7 @@ unsigned int calcPllValue(unsigned int request_orig, pll_value_t *pll) unsigned int input, request; unsigned int tmpClock, ret; const int max_OD = 3; - int max_d; + int max_d = 6; if (getChipType() == SM750LE) { /* SM750LE don't have prgrammable PLL and M/N values to work on. |