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authorDmytro Laktyushkin <[email protected]>2022-11-21 15:29:35 -0500
committerAlex Deucher <[email protected]>2022-12-06 10:15:40 -0500
commitf0882d3afb9a16285eaa2b76a7e60f46ebdefe92 (patch)
tree08bf07fdc25414855343ab4ca67d3285b77ee108
parent5f9f97c02dd2ee25c8b2c3001a75389dc66743b2 (diff)
drm/amd/display: prevent seamless boot on displays that don't have the preferred dig
Seamless boot requires VBIOS to select dig matching to link order wise. A significant amount of dal logic makes assumption we are using preferred dig for eDP and if this isn't the case then seamless boot is not supported. Reviewed-by: Martin Leung <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 87994ae0a397..486d18290b9f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1556,6 +1556,9 @@ bool dc_validate_boot_timing(const struct dc *dc,
if (tg_inst >= dc->res_pool->timing_generator_count)
return false;
+ if (tg_inst != link->link_enc->preferred_engine)
+ return false;
+
tg = dc->res_pool->timing_generators[tg_inst];
if (!tg->funcs->get_hw_timing)