diff options
| author | Karthikeyan Gopal <[email protected]> | 2023-05-30 17:01:47 +0100 |
|---|---|---|
| committer | Herbert Xu <[email protected]> | 2023-06-09 17:10:04 +0800 |
| commit | f0051844fba1a304beafe3b0d529be35cb468fda (patch) | |
| tree | 9905354c64e90b9070200c3110ddb4d1b9ca1126 | |
| parent | c8c6ee5199bf70f369d5dd97bad7072361ba569d (diff) | |
crypto: qat - update slice mask for 4xxx devices
Update slice mask enum for 4xxx device with BIT(7) to mask SMX fuse.
This change is done to align the slice mask with the hardware fuse
register.
Signed-off-by: Karthikeyan Gopal <[email protected]>
Reviewed-by: Giovanni Cabiddu <[email protected]>
Signed-off-by: Giovanni Cabiddu <[email protected]>
Signed-off-by: Herbert Xu <[email protected]>
| -rw-r--r-- | drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h index 085e259c245a..e5b314d2b60e 100644 --- a/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h +++ b/drivers/crypto/intel/qat/qat_4xxx/adf_4xxx_hw_data.h @@ -72,7 +72,7 @@ enum icp_qat_4xxx_slice_mask { ICP_ACCEL_4XXX_MASK_COMPRESS_SLICE = BIT(3), ICP_ACCEL_4XXX_MASK_UCS_SLICE = BIT(4), ICP_ACCEL_4XXX_MASK_EIA3_SLICE = BIT(5), - ICP_ACCEL_4XXX_MASK_SMX_SLICE = BIT(6), + ICP_ACCEL_4XXX_MASK_SMX_SLICE = BIT(7), }; void adf_init_hw_data_4xxx(struct adf_hw_device_data *hw_data, u32 dev_id); |