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authorGeert Uytterhoeven <[email protected]>2018-06-01 11:28:19 +0200
committerPetr Mladek <[email protected]>2018-06-05 09:43:18 +0200
commitef4b0be62641d296cf4c0ad8f75ab83ab066ed51 (patch)
tree74ba5ba64aae237f1ac3cdc4d1e143abc64dbd54
parent357aa6aefebe888c712152cb83c9e700f98eebd1 (diff)
clk: renesas: cpg-mssr: Stop using printk format %pCr
Printk format "%pCr" will be removed soon, as clk_get_rate() must not be called in atomic context. Replace it by open-coding the operation. This is safe here, as the code runs in task context. Link: http://lkml.kernel.org/r/[email protected] To: Jia-Ju Bai <[email protected]> To: Jonathan Corbet <[email protected]> To: Michael Turquette <[email protected]> To: Stephen Boyd <[email protected]> To: Zhang Rui <[email protected]> To: Eduardo Valentin <[email protected]> To: Eric Anholt <[email protected]> To: Stefan Wahren <[email protected]> To: Greg Kroah-Hartman <[email protected]> Cc: Sergey Senozhatsky <[email protected]> Cc: Petr Mladek <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Steven Rostedt <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: Geert Uytterhoeven <[email protected]> Cc: [email protected] # 4.5+ Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Petr Mladek <[email protected]>
-rw-r--r--drivers/clk/renesas/renesas-cpg-mssr.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index e3cc72c81311..2c9988fef656 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -258,8 +258,9 @@ struct clk *cpg_mssr_clk_src_twocell_get(struct of_phandle_args *clkspec,
dev_err(dev, "Cannot get %s clock %u: %ld", type, clkidx,
PTR_ERR(clk));
else
- dev_dbg(dev, "clock (%u, %u) is %pC at %pCr Hz\n",
- clkspec->args[0], clkspec->args[1], clk, clk);
+ dev_dbg(dev, "clock (%u, %u) is %pC at %lu Hz\n",
+ clkspec->args[0], clkspec->args[1], clk,
+ clk_get_rate(clk));
return clk;
}
@@ -326,7 +327,7 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
if (IS_ERR_OR_NULL(clk))
goto fail;
- dev_dbg(dev, "Core clock %pC at %pCr Hz\n", clk, clk);
+ dev_dbg(dev, "Core clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
priv->clks[id] = clk;
return;
@@ -392,7 +393,7 @@ static void __init cpg_mssr_register_mod_clk(const struct mssr_mod_clk *mod,
if (IS_ERR(clk))
goto fail;
- dev_dbg(dev, "Module clock %pC at %pCr Hz\n", clk, clk);
+ dev_dbg(dev, "Module clock %pC at %lu Hz\n", clk, clk_get_rate(clk));
priv->clks[id] = clk;
priv->smstpcr_saved[clock->index / 32].mask |= BIT(clock->index % 32);
return;