diff options
| author | Manivannan Sadhasivam <[email protected]> | 2023-03-08 11:16:30 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-03-09 13:56:25 -0800 |
| commit | ee1d5100c37e7a95af506c7addf018f652545ce6 (patch) | |
| tree | 218bbdbe531a2dea46d75f7f558adf112daafb56 | |
| parent | b891251b40d4dc4cfd28341f62f6784c02ad3a78 (diff) | |
arm64: dts: qcom: sm8550: Mark UFS controller as cache coherent
The UFS controller on SM8550 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.
Fixes: 35cf1aaab169 ("arm64: dts: qcom: sm8550: Add UFS host controller and phy nodes")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8550.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 24aa724c12ea..5d0888398b3c 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -1905,6 +1905,7 @@ required-opps = <&rpmhpd_opp_nom>; iommus = <&apps_smmu 0x60 0x0>; + dma-coherent; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; |