diff options
author | Aaron Liu <[email protected]> | 2021-11-02 16:45:09 +0800 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2021-11-03 12:22:08 -0400 |
commit | e8a423c589a0a7848c019d70231e9da9784467ae (patch) | |
tree | f3a6b4b6ebb0a749a8ca1343c938cda372ff5a9f | |
parent | 91adec9e07097e538691daed5d934e7886dd1dc3 (diff) |
drm/amdgpu: update RLC_PG_DELAY_3 Value to 200us for yellow carp
For yellow carp, the desired CGPG hysteresis value is 0x4E20.
Signed-off-by: Aaron Liu <[email protected]>
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c index 90a834dc4008..b53b36f5ae92 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c @@ -8316,11 +8316,8 @@ static void gfx_v10_cntl_power_gating(struct amdgpu_device *adev, bool enable) if (enable && (adev->pg_flags & AMD_PG_SUPPORT_GFX_PG)) { switch (adev->ip_versions[GC_HWIP][0]) { case IP_VERSION(10, 3, 1): - data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh; - WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data); - break; case IP_VERSION(10, 3, 3): - data = 0x1388 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh; + data = 0x4E20 & RLC_PG_DELAY_3__CGCG_ACTIVE_BEFORE_CGPG_MASK_Vangogh; WREG32_SOC15(GC, 0, mmRLC_PG_DELAY_3, data); break; default: |