diff options
author | Marek Szyprowski <[email protected]> | 2016-11-17 09:57:58 +0100 |
---|---|---|
committer | Krzysztof Kozlowski <[email protected]> | 2016-11-18 13:37:52 +0200 |
commit | e681376e6231321f0930154581f4f8afa3c6b20c (patch) | |
tree | 943b751b53992a6ab31e95121caa6d09eefb5dce | |
parent | e206f85cfb4303b55edbf54b1284120c68f0da95 (diff) |
arm64: dts: exynos: Add missing parent clocks to audio block in Exynos5433 SoC
Audio PLL and oscillator clocks are proper parent clocks for AUD CMU.
They are not visible as such on first glance on Exynos5433 SoC docs,
but they are needed for this CMU to operate properly.
Signed-off-by: Marek Szyprowski <[email protected]>
Reviewed-by: Sylwester Nawrocki <[email protected]>
Reviewed-by: Chanwoo Choi <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index f5dab754d61f..71e2313b74cd 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -374,6 +374,8 @@ compatible = "samsung,exynos5433-cmu-aud"; reg = <0x114c0000 0x1000>; #clock-cells = <1>; + clock-names = "oscclk", "fout_aud_pll"; + clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>; }; cmu_bus0: clock-controller@13600000 { |