diff options
| author | Frederic Barrat <[email protected]> | 2015-12-07 14:34:40 +0100 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2015-12-08 16:57:01 +1100 |
| commit | e606e035cc7293a3824527d97359711fdda00663 (patch) | |
| tree | 161661be9b38a06695c12a5f1ff4c49c99afd711 | |
| parent | 25642e1459ace29f6ce5a171efc8b7b59a52a2d4 (diff) | |
cxl: Set endianess of kernel contexts
A process element (defined in CAIA) keeps track of the endianess of
contexts through the Little Endian (LE) bit of the State Register. It
is currently set for user contexts, but was somehow forgotten for
kernel contexts, so this patch fixes it.
It could lead to erratic behavior from an AFU when the context is
attached through the kernel API.
Fixes: 2f663527bd6a ("cxl: Configure PSL for kernel contexts and merge code")
Cc: [email protected] # 4.2+
Signed-off-by: Frederic Barrat <[email protected]>
Suggested-by: Michael Neuling <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
| -rw-r--r-- | drivers/misc/cxl/native.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c index d2e75c88f4d2..f40909793490 100644 --- a/drivers/misc/cxl/native.c +++ b/drivers/misc/cxl/native.c @@ -497,6 +497,7 @@ static u64 calculate_sr(struct cxl_context *ctx) { u64 sr = 0; + set_endian(sr); if (ctx->master) sr |= CXL_PSL_SR_An_MP; if (mfspr(SPRN_LPCR) & LPCR_TC) @@ -506,7 +507,6 @@ static u64 calculate_sr(struct cxl_context *ctx) sr |= CXL_PSL_SR_An_HV; } else { sr |= CXL_PSL_SR_An_PR | CXL_PSL_SR_An_R; - set_endian(sr); sr &= ~(CXL_PSL_SR_An_HV); if (!test_tsk_thread_flag(current, TIF_32BIT)) sr |= CXL_PSL_SR_An_SF; |