diff options
| author | Niklas Cassel <[email protected]> | 2019-01-24 13:45:08 +0100 |
|---|---|---|
| committer | Andy Gross <[email protected]> | 2019-02-06 15:51:58 -0600 |
| commit | e4f045ef38e61ba37aa4afc916fce4fc1b37aa19 (patch) | |
| tree | d733c3e572598d743a76191fd9b1de5974ce6aaf | |
| parent | 5e8204893f62792ebeed88ae505cf658b216eaa0 (diff) | |
arm64: dts: msm8916: remove bogus argument to the cpu clock
The apcs node has #clock-cells = <0>, which means that those who
references it should specify 0 arguments.
The apcs reference in the cpu node incorrectly specifies an argument,
remove this bogus argument.
Fixes: 65afdf458360 ("arm64: dts: qcom: msm8916: Add CPU frequency scaling support")
Signed-off-by: Niklas Cassel <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Reviewed-by: Amit Kucheria <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index c5348c3da5a2..60afbf1bab8f 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -111,7 +111,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; - clocks = <&apcs 0>; + clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; }; @@ -123,7 +123,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; - clocks = <&apcs 0>; + clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; }; @@ -135,7 +135,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; - clocks = <&apcs 0>; + clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; }; @@ -147,7 +147,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; cpu-idle-states = <&CPU_SPC>; - clocks = <&apcs 0>; + clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; }; |