diff options
author | Krzysztof Kozlowski <[email protected]> | 2023-10-23 11:12:21 +0900 |
---|---|---|
committer | Arnd Bergmann <[email protected]> | 2023-10-23 21:11:53 +0200 |
commit | e035ddb68bb2827cff3aad1a6ff17ecc6e62f07e (patch) | |
tree | 59ff3235c142ec46a0b07f65f128ff813ffba783 | |
parent | 0804f3bec9e9a3e9f3b5431ac9a11417041bc4c2 (diff) |
arm64: dts: socionext: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified property to fix warnings like:
uniphier-ld11-ref.dtb: l2-cache: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Kunihiko Hayashi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 1 | ||||
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 | ||||
-rw-r--r-- | arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 1 |
3 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 54e58d945fd7..4680571c264d 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -53,6 +53,7 @@ l2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index 18390cba2eda..335093da6573 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -87,11 +87,13 @@ a72_l2: l2-cache0 { compatible = "cache"; cache-level = <2>; + cache-unified; }; a53_l2: l2-cache1 { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi index 56e037900818..d6e3cc6fdb25 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi @@ -84,6 +84,7 @@ l2: l2-cache { compatible = "cache"; cache-level = <2>; + cache-unified; }; }; |