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| author | Rikard Falkeborn <[email protected]> | 2019-10-22 21:25:47 +0200 |
|---|---|---|
| committer | Paul Burton <[email protected]> | 2019-10-23 20:57:38 -0700 |
| commit | e02d026f08f1fedb8c94d6f659ccc7c6ce1043f3 (patch) | |
| tree | ae369c6a9dbc5b72e537cc92437c63c2560708de | |
| parent | 9dd422f69777b928f8a12e5392d4aeeb00a55c2b (diff) | |
MIPS: Loongson: Fix GENMASK misuse
Arguments are supposed to be ordered high then low.
Fixes: 6a6f9b7dafd50efc1b2 ("MIPS: Loongson: Add CFUCFG&CSR support")
Signed-off-by: Rikard Falkeborn <[email protected]>
Reviewed-by: Huacai Chen <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
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Cc: [email protected]
| -rw-r--r-- | arch/mips/include/asm/mach-loongson64/loongson_regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-loongson64/loongson_regs.h b/arch/mips/include/asm/mach-loongson64/loongson_regs.h index 6e3569ab8936..363a47a5d26e 100644 --- a/arch/mips/include/asm/mach-loongson64/loongson_regs.h +++ b/arch/mips/include/asm/mach-loongson64/loongson_regs.h @@ -86,7 +86,7 @@ static inline u32 read_cpucfg(u32 reg) #define LOONGSON_CFG2_LGFTP BIT(19) #define LOONGSON_CFG2_LGFTPREV GENMASK(22, 20) #define LOONGSON_CFG2_LLFTP BIT(23) -#define LOONGSON_CFG2_LLFTPREV GENMASK(24, 26) +#define LOONGSON_CFG2_LLFTPREV GENMASK(26, 24) #define LOONGSON_CFG2_LCSRP BIT(27) #define LOONGSON_CFG2_LDISBLIKELY BIT(28) |