diff options
| author | Luwei Kang <[email protected]> | 2018-10-24 16:05:09 +0800 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2018-12-21 11:28:33 +0100 |
| commit | e0018afec50a4846789d92a1b7cd6cd7f816c448 (patch) | |
| tree | dfb792719c9c40b038ee553e2592dc87b90a2108 | |
| parent | 69843a913fc86b3d0ef503d6cc15886ef8943626 (diff) | |
perf/x86/intel/pt: add new capability for Intel PT
This adds support for "output to Trace Transport subsystem"
capability of Intel PT. It means that PT can output its
trace to an MMIO address range rather than system memory buffer.
Acked-by: Song Liu <[email protected]>
Signed-off-by: Luwei Kang <[email protected]>
Reviewed-by: Thomas Gleixner <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
| -rw-r--r-- | arch/x86/events/intel/pt.c | 1 | ||||
| -rw-r--r-- | arch/x86/include/asm/intel_pt.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c index 918a43937749..9494ca68fd9d 100644 --- a/arch/x86/events/intel/pt.c +++ b/arch/x86/events/intel/pt.c @@ -68,6 +68,7 @@ static struct pt_cap_desc { PT_CAP(topa_output, 0, CPUID_ECX, BIT(0)), PT_CAP(topa_multiple_entries, 0, CPUID_ECX, BIT(1)), PT_CAP(single_range_output, 0, CPUID_ECX, BIT(2)), + PT_CAP(output_subsys, 0, CPUID_ECX, BIT(3)), PT_CAP(payloads_lip, 0, CPUID_ECX, BIT(31)), PT_CAP(num_address_ranges, 1, CPUID_EAX, 0x3), PT_CAP(mtc_periods, 1, CPUID_EAX, 0xffff0000), diff --git a/arch/x86/include/asm/intel_pt.h b/arch/x86/include/asm/intel_pt.h index 00f4afb2b7de..634f99b1dc22 100644 --- a/arch/x86/include/asm/intel_pt.h +++ b/arch/x86/include/asm/intel_pt.h @@ -16,6 +16,7 @@ enum pt_capabilities { PT_CAP_topa_output, PT_CAP_topa_multiple_entries, PT_CAP_single_range_output, + PT_CAP_output_subsys, PT_CAP_payloads_lip, PT_CAP_num_address_ranges, PT_CAP_mtc_periods, |