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authorVille Syrjälä <ville.syrjala@linux.intel.com>2022-03-09 18:49:44 +0200
committerVille Syrjälä <ville.syrjala@linux.intel.com>2022-03-18 22:37:43 +0200
commitde2cac863da9427f4476edfc9af35343d0b19a56 (patch)
tree1edadf1e7fd630c1605917f657382def179e6fc5
parent15fc156f22db140ea2d25ecd4aff15e3d800ec35 (diff)
drm/i915: Reject excessive SAGV block time
If the mailbox returns an exceesively large SAGV block time let's just reject it. This avoids having to worry about overflows when we add the SAGV block time to the wm0 latency. We shall put the limit arbitrarily at U16_MAX. >65msec latency doesn't really make sense to me in any case. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220309164948.10671-5-ville.syrjala@linux.intel.com Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 36f5bccabf64..166246fa27e4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3716,6 +3716,12 @@ static void intel_sagv_init(struct drm_i915_private *i915)
drm_dbg_kms(&i915->drm, "SAGV supported: %s, original SAGV block time: %u us\n",
str_yes_no(intel_has_sagv(i915)), i915->sagv_block_time_us);
+ /* avoid overflow when adding with wm0 latency/etc. */
+ if (drm_WARN(&i915->drm, i915->sagv_block_time_us > U16_MAX,
+ "Excessive SAGV block time %u, ignoring\n",
+ i915->sagv_block_time_us))
+ i915->sagv_block_time_us = 0;
+
if (!intel_has_sagv(i915))
i915->sagv_block_time_us = 0;
}