diff options
| author | Samuel Holland <[email protected]> | 2023-01-26 00:34:19 -0600 |
|---|---|---|
| committer | Jernej Skrabec <[email protected]> | 2023-01-27 23:21:06 +0100 |
| commit | dca36f7b3dd7eb574f0958484d3d21cfd8af2651 (patch) | |
| tree | d7824e89acc4a632aa9515c4d8ee1b2cf54b2b0a | |
| parent | 6f5178acf63614f2ee27450b2ab4d4980a698161 (diff) | |
riscv: dts: allwinner: d1: Add power controller node
The Allwinner D1 family of SoCs contain a PPU power domain controller
separate from the PRCM. It can power down the video engine and DSP, and
it contains special logic for hardware-assisted CPU idle.
Signed-off-by: Samuel Holland <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>
| -rw-r--r-- | arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index 3723612b1fd8..6fadcee7800f 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -799,6 +799,14 @@ }; }; + ppu: power-controller@7001000 { + compatible = "allwinner,sun20i-d1-ppu"; + reg = <0x7001000 0x1000>; + clocks = <&r_ccu CLK_BUS_R_PPU>; + resets = <&r_ccu RST_BUS_R_PPU>; + #power-domain-cells = <1>; + }; + r_ccu: clock-controller@7010000 { compatible = "allwinner,sun20i-d1-r-ccu"; reg = <0x7010000 0x400>; |