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| author | Jamie Iles <[email protected]> | 2022-11-15 20:08:31 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2022-12-02 10:04:37 -0800 |
| commit | dc58a24db8c12ea361e94eaf53adc5d471534694 (patch) | |
| tree | 33800d8989bbdd0b2284a87b175eeed701e7ef21 | |
| parent | 3bd7743f8d6d7171db9897a746038eefd52a1fbd (diff) | |
RISC-V: preserve a1 in mcount
The RISC-V ELF psABI states that both a0 and a1 are used for return
values so we should preserve them both in return_to_handler. This is
especially important for RV32 for functions returning a 64-bit quantity
otherwise the return value can be corrupted and undefined behaviour
results.
Reviewed-by: Andrew Jones <[email protected]>
Signed-off-by: Jamie Iles <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
| -rw-r--r-- | arch/riscv/kernel/mcount.S | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/riscv/kernel/mcount.S b/arch/riscv/kernel/mcount.S index 613bd07c6268..30102aadc4d7 100644 --- a/arch/riscv/kernel/mcount.S +++ b/arch/riscv/kernel/mcount.S @@ -29,6 +29,7 @@ REG_S s0, 2*SZREG(sp) REG_S ra, 3*SZREG(sp) REG_S a0, 1*SZREG(sp) + REG_S a1, 0*SZREG(sp) addi s0, sp, 4*SZREG .endm @@ -42,6 +43,7 @@ REG_L ra, 3*SZREG(sp) REG_L s0, 2*SZREG(sp) REG_L a0, 1*SZREG(sp) + REG_L a1, 0*SZREG(sp) addi sp, sp, 4*SZREG .endm @@ -71,9 +73,9 @@ ENTRY(return_to_handler) mv a0, t6 #endif call ftrace_return_to_handler - mv a1, a0 + mv a2, a0 RESTORE_RET_ABI_STATE - jalr a1 + jalr a2 ENDPROC(return_to_handler) #endif |