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authorBartosz Golaszewski <[email protected]>2023-03-09 11:37:44 +0100
committerBjorn Andersson <[email protected]>2023-03-21 19:51:42 -0700
commitdc3ad22112de7fe76352ef2aa2943b62eb1836a3 (patch)
tree26bb25e559496595a8bdcd4e7daf8c15791d6711
parent4f278f71c79f174c027d07f57837d1ca41b2df37 (diff)
arm64: dts: qcom: sa8775p: add the QUPv3 #2 node
Add the second instance of the QUPv3 engine to the sa8775p.dtsi. Signed-off-by: Bartosz Golaszewski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--arch/arm64/boot/dts/qcom/sa8775p.dtsi13
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index dc21e8450058..9fbddd980f60 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -499,6 +499,19 @@
};
};
+ qupv3_id_2: geniqup@8c0000 {
+ compatible = "qcom,geni-se-qup";
+ reg = <0x0 0x008c0000 0x0 0x6000>;
+ ranges;
+ clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
+ <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
+ clock-names = "m-ahb", "s-ahb";
+ iommus = <&apps_smmu 0x5a3 0x0>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ status = "disabled";
+ };
+
intc: interrupt-controller@17a00000 {
compatible = "arm,gic-v3";
reg = <0x0 0x17a00000 0x0 0x10000>, /* GICD */