diff options
| author | Eugen Hristev <[email protected]> | 2019-11-11 13:28:57 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2020-01-05 19:06:31 -0800 |
| commit | db2f44820a981d353c41d36b27dccd3bb90b5e62 (patch) | |
| tree | 48dc3faf4f73a7fa3d32855f022a847e18fc286b | |
| parent | e42617b825f8073569da76dc4510bfa019b1c35a (diff) | |
clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default value
Product datasheet recommends different values for UPLL and PLLA analog control
register.
Adapt accordingly.
Signed-off-by: Eugen Hristev <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Acked-by: Nicolas Ferre <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/at91/clk-sam9x60-pll.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index 34b817825b22..dfb354a5ff18 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -25,7 +25,8 @@ #define PMC_PLL_CTRL1_MUL_MSK GENMASK(30, 24) #define PMC_PLL_ACR 0x18 -#define PMC_PLL_ACR_DEFAULT 0x1b040010UL +#define PMC_PLL_ACR_DEFAULT_UPLL 0x12020010UL +#define PMC_PLL_ACR_DEFAULT_PLLA 0x00020010UL #define PMC_PLL_ACR_UTMIVR BIT(12) #define PMC_PLL_ACR_UTMIBG BIT(13) #define PMC_PLL_ACR_LOOP_FILTER_MSK GENMASK(31, 24) @@ -88,7 +89,10 @@ static int sam9x60_pll_prepare(struct clk_hw *hw) } /* Recommended value for PMC_PLL_ACR */ - val = PMC_PLL_ACR_DEFAULT; + if (pll->characteristics->upll) + val = PMC_PLL_ACR_DEFAULT_UPLL; + else + val = PMC_PLL_ACR_DEFAULT_PLLA; regmap_write(regmap, PMC_PLL_ACR, val); regmap_write(regmap, PMC_PLL_CTRL1, |