diff options
| author | Matt Roper <[email protected]> | 2022-08-18 16:41:44 -0700 |
|---|---|---|
| committer | Radhakrishna Sripada <[email protected]> | 2022-08-25 11:00:29 -0700 |
| commit | da30390b93c377545fdf5ecec34aee018f90485b (patch) | |
| tree | 7ec8a9dedd7f40449213d4a5b60c582ae227e866 | |
| parent | 6509dd1111928a351204af1fc8e6aa61e0c59002 (diff) | |
drm/i915/mtl: MMIO range is now 4MB
Previously only dgfx platforms had a 4MB MMIO range, but starting with
MTL we now use the larger range for all platforms.
Bspec: 63834, 63830
Signed-off-by: Matt Roper <[email protected]>
Signed-off-by: Radhakrishna Sripada <[email protected]>
Reviewed-by: Balasubramani Vivekanandan <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/intel_uncore.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c index 2a21c6515eaf..c7ef5f2ff2e1 100644 --- a/drivers/gpu/drm/i915/intel_uncore.c +++ b/drivers/gpu/drm/i915/intel_uncore.c @@ -2235,14 +2235,15 @@ int intel_uncore_setup_mmio(struct intel_uncore *uncore, phys_addr_t phys_addr) * clobbering the GTT which we want ioremap_wc instead. Fortunately, * the register BAR remains the same size for all the earlier * generations up to Ironlake. - * For dgfx chips register range is expanded to 4MB. + * For dgfx chips register range is expanded to 4MB, and this larger + * range is also used for integrated gpus beginning with Meteor Lake. */ - if (GRAPHICS_VER(i915) < 5) - mmio_size = 512 * 1024; - else if (IS_DGFX(i915)) + if (IS_DGFX(i915) || GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70)) mmio_size = 4 * 1024 * 1024; - else + else if (GRAPHICS_VER(i915) >= 5) mmio_size = 2 * 1024 * 1024; + else + mmio_size = 512 * 1024; uncore->regs = ioremap(phys_addr, mmio_size); if (uncore->regs == NULL) { |