diff options
| author | AngeloGioacchino Del Regno <[email protected]> | 2022-01-03 15:37:12 +0100 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2022-01-06 18:27:10 -0800 |
| commit | d95abcab7b4aef11b29a5342b11fa60fd211929f (patch) | |
| tree | 9d3d3704ced7bb418928a5a4ab6fdd240bdf9157 | |
| parent | 4233463866796affc6674888e4cbaa24e0ff7965 (diff) | |
clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers
Appropriately change calls to regmap_update_bits() with regmap_set_bits()
and regmap_clear_bits() for improved readability.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/mediatek/clk-gate.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c index 957fa1d68f07..5d88b428565b 100644 --- a/drivers/clk/mediatek/clk-gate.c +++ b/drivers/clk/mediatek/clk-gate.c @@ -53,17 +53,15 @@ static void mtk_cg_clr_bit(struct clk_hw *hw) static void mtk_cg_set_bit_no_setclr(struct clk_hw *hw) { struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); - u32 cgbit = BIT(cg->bit); - regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, cgbit); + regmap_set_bits(cg->regmap, cg->sta_ofs, BIT(cg->bit)); } static void mtk_cg_clr_bit_no_setclr(struct clk_hw *hw) { struct mtk_clk_gate *cg = to_mtk_clk_gate(hw); - u32 cgbit = BIT(cg->bit); - regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, 0); + regmap_clear_bits(cg->regmap, cg->sta_ofs, BIT(cg->bit)); } static int mtk_cg_enable(struct clk_hw *hw) |