diff options
| author | AngeloGioacchino Del Regno <[email protected]> | 2022-09-02 10:11:50 +0200 |
|---|---|---|
| committer | Matthias Brugger <[email protected]> | 2022-09-13 18:59:01 +0200 |
| commit | d86a1c69bd9a4d6859293cd0ecebfa692f6a3150 (patch) | |
| tree | 9748b2378f57ece233b5e6d898842086b1700393 | |
| parent | 5334bed7b2344115928cca4c1a63b32ccde1814d (diff) | |
arm64: dts: mediatek: cherry: Enable the System Companion Processor
MT8195 features a SCP like some other older SoCs, and Cherry uses it
for various tasks. Add the required pin configuration and DMA pool
and enable the node.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Matthias Brugger <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi index fcc600674339..e83d58d99757 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi @@ -104,6 +104,18 @@ enable-active-high; regulator-always-on; }; + + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + scp_mem: memory@50000000 { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + }; }; &i2c0 { @@ -600,6 +612,14 @@ }; }; + scp_pins: scp-default-pins { + pins-vreq { + pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>; + bias-disable; + input-enable; + }; + }; + spi0_pins: spi0-default-pins { pins-cs-mosi-clk { pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>, @@ -643,6 +663,15 @@ interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; }; +&scp { + status = "okay"; + + firmware-name = "mediatek/mt8195/scp.img"; + memory-region = <&scp_mem>; + pinctrl-names = "default"; + pinctrl-0 = <&scp_pins>; +}; + &spi0 { status = "okay"; |