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authorAlex Bee <[email protected]>2024-05-06 17:51:03 +0200
committerHeiko Stuebner <[email protected]>2024-06-23 22:05:05 +0200
commitd244d6cc718a048672bfb148a6bc9c593a0e1207 (patch)
tree04603398d436da33592b5dcb60feb6cac52440d1
parentf87427158d268fe4747cc223de7a2523617b7475 (diff)
ARM: dts: rockchip: Add spdif node for RK3128
The SoC has a S/PDIF TX controller which is fully compatible with older generation Rockchip SoCs. Signed-off-by: Alex Bee <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
-rw-r--r--arch/arm/boot/dts/rockchip/rk3128.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
index 2c41a123c96a..4ced1f1fabea 100644
--- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
@@ -411,6 +411,20 @@
status = "disabled";
};
+ spdif: spdif@10204000 {
+ compatible = "rockchip,rk3128-spdif", "rockchip,rk3066-spdif";
+ reg = <0x10204000 0x1000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
+ clock-names = "mclk", "hclk";
+ dmas = <&pdma 13>;
+ dma-names = "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx>;
+ #sound-dai-cells = <0>;
+ status = "disabled";
+ };
+
sdmmc: mmc@10214000 {
compatible = "rockchip,rk3128-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x10214000 0x4000>;