diff options
author | Lucas Stach <[email protected]> | 2024-02-27 16:04:35 -0600 |
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committer | Vinod Koul <[email protected]> | 2024-03-29 00:27:06 +0530 |
commit | d0f4b70eb9a9ed05a37d963655698906cd4dac9a (patch) | |
tree | 751a0c5143c44ac1f30e85e2762288ee64e20457 | |
parent | 4cece764965020c22cff7665b18a012006359095 (diff) |
dt-bindings: phy: add binding for the i.MX8MP HDMI PHY
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Adam Ford <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Luca Ceresoli <[email protected]>
Tested-by: Tommaso Merciai <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
-rw-r--r-- | Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 |
1 files changed, 62 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml new file mode 100644 index 000000000000..c43e86a8c2e0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP HDMI PHY + +maintainers: + - Lucas Stach <[email protected]> + +properties: + compatible: + enum: + - fsl,imx8mp-hdmi-phy + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + items: + - const: apb + - const: ref + + "#phy-cells": + const: 0 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + - clock-names + - "#phy-cells" + - power-domains + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/power/imx8mp-power.h> + + phy@32fdff00 { + compatible = "fsl,imx8mp-hdmi-phy"; + reg = <0x32fdff00 0x100>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "ref"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; + #clock-cells = <0>; + #phy-cells = <0>; + }; |