diff options
author | Shyam Sundar S K <[email protected]> | 2023-09-10 19:50:33 +0530 |
---|---|---|
committer | Ilpo Järvinen <[email protected]> | 2023-10-06 12:57:22 +0300 |
commit | cdb1013808bed0c0c392b44ed4eed6c7743028c3 (patch) | |
tree | 39a8fdc5acd58d3e95008193e5157f798cfe950e | |
parent | 8df012a7f513141412b3c35af204ccdb810fcc81 (diff) |
platform/x86/amd/pmc: Add PMFW command id to support S2D force flush
Recent PMFW have the capability that can force flush the FIFO
contents to DRAM on sending a command id via the mailbox. Add this support
to the driver.
Co-developed-by: Sanket Goswami <[email protected]>
Signed-off-by: Sanket Goswami <[email protected]>
Signed-off-by: Shyam Sundar S K <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[ij: Corrected whitespace in dev_dbg_once()]
Reviewed-by: Ilpo Järvinen <[email protected]>
Signed-off-by: Ilpo Järvinen <[email protected]>
-rw-r--r-- | drivers/platform/x86/amd/pmc/pmc.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/platform/x86/amd/pmc/pmc.c b/drivers/platform/x86/amd/pmc/pmc.c index c1e788b67a74..922932a71233 100644 --- a/drivers/platform/x86/amd/pmc/pmc.c +++ b/drivers/platform/x86/amd/pmc/pmc.c @@ -55,6 +55,9 @@ #define S2D_TELEMETRY_BYTES_MAX 0x100000 #define S2D_TELEMETRY_DRAMBYTES_MAX 0x1000000 +/* STB Spill to DRAM Message Definition */ +#define STB_FORCE_FLUSH_DATA 0xCF + /* Base address of SMU for mapping physical address to virtual address */ #define AMD_PMC_MAPPING_SIZE 0x01000 #define AMD_PMC_BASE_ADDR_OFFSET 0x10000 @@ -236,7 +239,7 @@ static const struct file_operations amd_pmc_stb_debugfs_fops = { static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp) { struct amd_pmc_dev *dev = filp->f_inode->i_private; - u32 *buf, fsize, num_samples, stb_rdptr_offset = 0; + u32 *buf, fsize, num_samples, val, stb_rdptr_offset = 0; int ret; /* Write dummy postcode while reading the STB buffer */ @@ -251,6 +254,10 @@ static int amd_pmc_stb_debugfs_open_v2(struct inode *inode, struct file *filp) /* Spill to DRAM num_samples uses separate SMU message port */ dev->msg_port = 1; + ret = amd_pmc_send_cmd(dev, 0, &val, STB_FORCE_FLUSH_DATA, 1); + if (ret) + dev_dbg_once(dev->dev, "S2D force flush not supported: %d\n", ret); + /* Get the num_samples to calculate the last push location */ ret = amd_pmc_send_cmd(dev, S2D_NUM_SAMPLES, &num_samples, dev->s2d_msg_id, true); /* Clear msg_port for other SMU operation */ |