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| author | Manivannan Sadhasivam <[email protected]> | 2021-01-18 11:08:47 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2021-01-22 13:50:11 -0600 |
| commit | ca61452bd74683e2b79fe5bbd3670e4e796ec8d3 (patch) | |
| tree | f44d6ae9a341e69632a28c9ce555f842c0d1ad5c | |
| parent | ea07e8a9c36307eb652c5f2d17c114b423f6136b (diff) | |
ARM: qcom_defconfig: Enable DWC3 controller and PHYs
Enable DWC3 controller, QMP PHY and SNPS HS PHY for using with platforms
like SDX55.
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | arch/arm/configs/qcom_defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/configs/qcom_defconfig b/arch/arm/configs/qcom_defconfig index 51eeefd264d3..77f234bf84c8 100644 --- a/arch/arm/configs/qcom_defconfig +++ b/arch/arm/configs/qcom_defconfig @@ -196,6 +196,7 @@ CONFIG_USB_CONFIGFS_ECM=y CONFIG_USB_CONFIGFS_F_FS=y CONFIG_USB_ULPI_BUS=y CONFIG_USB_ETH=m +CONFIG_USB_DWC3=y CONFIG_MMC=y CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_ARMMMCI=y @@ -263,6 +264,8 @@ CONFIG_PHY_QCOM_APQ8064_SATA=y CONFIG_PHY_QCOM_IPQ806X_SATA=y CONFIG_PHY_QCOM_USB_HS=y CONFIG_PHY_QCOM_USB_HSIC=y +CONFIG_PHY_QCOM_QMP=y +CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=y CONFIG_QCOM_QFPROM=y CONFIG_INTERCONNECT=y CONFIG_INTERCONNECT_QCOM=y |