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authorMark Brown <[email protected]>2021-05-12 16:11:30 +0100
committerWill Deacon <[email protected]>2021-05-26 20:04:28 +0100
commitc9f6890bca111a879a8af1f2390ac49cf05b11df (patch)
tree81989eec0392c8c3595abff439b7a77f528d1297
parent483dbf6a35907610597fdc304bd32ecba40cdff0 (diff)
arm64/sve: Use the sve_flush macros in sve_load_from_fpsimd_state()
This makes the code a bit clearer and as a result we can also make the indentation more normal, there is no change to the generated code. Signed-off-by: Mark Brown <[email protected]> Reviewed-by: Dave Martin <[email protected]> Acked-by: Catalin Marinas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
-rw-r--r--arch/arm64/kernel/entry-fpsimd.S9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm64/kernel/entry-fpsimd.S b/arch/arm64/kernel/entry-fpsimd.S
index 7921d58427c2..dd8382e5ce82 100644
--- a/arch/arm64/kernel/entry-fpsimd.S
+++ b/arch/arm64/kernel/entry-fpsimd.S
@@ -63,11 +63,10 @@ SYM_FUNC_END(sve_set_vq)
* and the rest zeroed. All the other SVE registers will be zeroed.
*/
SYM_FUNC_START(sve_load_from_fpsimd_state)
- sve_load_vq x1, x2, x3
- fpsimd_restore x0, 8
- _for n, 0, 15, _sve_pfalse \n
- _sve_wrffr 0
- ret
+ sve_load_vq x1, x2, x3
+ fpsimd_restore x0, 8
+ sve_flush_p_ffr
+ ret
SYM_FUNC_END(sve_load_from_fpsimd_state)
/* Zero all SVE registers but the first 128-bits of each vector */