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authorChris Wilson <[email protected]>2018-07-12 19:53:12 +0100
committerChris Wilson <[email protected]>2018-07-13 16:13:30 +0100
commitc9e666880de5a1fed04dc412b046916d542b72dd (patch)
tree03578ec6d9bbe299c9d10706bdbcd1d53797c5c1
parent250f8c8140ac0a5e5acb91891d6813f12778b224 (diff)
drm/i915/gtt: Disable read-only support under GVT
GVT is not propagating the PTE bits, and is always setting the read-write bit, thus breaking read-only support. Signed-off-by: Chris Wilson <[email protected]> Cc: Zhenyu Wang <[email protected]> Cc: Jon Bloomfield <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Matthew Auld <[email protected]> Reviewed-by: Jon Bloomfield <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 734b67f7853c..86a9618bab24 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1662,8 +1662,12 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
1ULL << 48 :
1ULL << 32;
- /* From bdw, there is support for read-only pages in the PPGTT */
- ppgtt->vm.has_read_only = true;
+ /*
+ * From bdw, there is support for read-only pages in the PPGTT.
+ *
+ * XXX GVT is not honouring the lack of RW in the PTE bits.
+ */
+ ppgtt->vm.has_read_only = !intel_vgpu_active(i915);
i915_address_space_init(&ppgtt->vm, i915);