diff options
| author | Nevenko Stupar <[email protected]> | 2018-10-11 18:04:14 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2018-11-05 14:21:34 -0500 |
| commit | c99155230b677236f79edc226fca80392cc84787 (patch) | |
| tree | d23fca51f7fcd14fb646026fd436bf52dcda319f | |
| parent | 8d6da3bbfd959a92bc4a20d6b8ad596f2bee033e (diff) | |
drm/amd/display: Add missing pipes registers for VGA enable/disable
Signed-off-by: Nevenko Stupar <[email protected]>
Reviewed-by: Aric Cyr <[email protected]>
Acked-by: Leo Li <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h index 7d977870131c..c83a7f05f14c 100644 --- a/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h +++ b/drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h @@ -282,6 +282,8 @@ struct dce_hwseq_registers { uint32_t D2VGA_CONTROL; uint32_t D3VGA_CONTROL; uint32_t D4VGA_CONTROL; + uint32_t D5VGA_CONTROL; + uint32_t D6VGA_CONTROL; uint32_t VGA_TEST_CONTROL; /* MMHUB registers. read only. temporary hack */ uint32_t VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32; |