diff options
| author | Alan Tull <[email protected]> | 2018-08-08 10:42:41 -0500 |
|---|---|---|
| committer | Dinh Nguyen <[email protected]> | 2018-08-30 08:38:26 -0500 |
| commit | c8da1d15b8a4957f105ad77bb1404d72e304566f (patch) | |
| tree | 25e3f6bdb5175fbb1f2efbcc8b8d68091c9df41f | |
| parent | 5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff) | |
arm64: dts: stratix10: i2c clock running out of spec
DesignWare I2C controller was observed running at 105.93kHz rather
than the specified 100kHz. Adjust device tree settings to bring it
within spec (a slightly conservative 98 MHz).
Signed-off-by: Alan Tull <[email protected]>
Signed-off-by: Dinh Nguyen <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 6edc4fa9fd42..53cf195c2ada 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -124,6 +124,8 @@ &i2c1 { status = "okay"; clock-frequency = <100000>; + i2c-sda-falling-time-ns = <890>; /* hcnt */ + i2c-sdl-falling-time-ns = <890>; /* lcnt */ adc@14 { compatible = "lltc,ltc2497"; |