diff options
| author | P Raviraj Sitaram <[email protected]> | 2018-09-10 19:57:14 +0530 |
|---|---|---|
| committer | Ville Syrjälä <[email protected]> | 2018-09-11 16:49:41 +0300 |
| commit | c59d2da8ec189489a30b351d7fdb5923bcb9ca5f (patch) | |
| tree | b4bdc3249ab23bd57df17b93b84668037980aa98 | |
| parent | b84d9ab0b7239b22cb9a079e54b01f69b37bc211 (diff) | |
drm/i915/chv: Update csc coefficient matrix during modeset
During modeset, previously configured csc coefficient matrix,if any, will
not persist. This can result in blank screen as csc mode will be programmed
while loading LUT but csc coefficient matrix remains unprogrammed.
Changes since V1:
- Removed platform check
Signed-off-by: P Raviraj Sitaram <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 1c7321dadd84..ba8a955c4cd2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6013,6 +6013,8 @@ static void valleyview_crtc_enable(struct intel_crtc_state *pipe_config, i9xx_set_pipeconf(intel_crtc); + intel_color_set_csc(&pipe_config->base); + intel_crtc->active = true; intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); |