diff options
| author | Rafał Miłecki <[email protected]> | 2024-06-04 08:31:59 +0200 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <[email protected]> | 2024-06-27 10:10:24 +0200 |
| commit | c3e87229b0fd8917af8dad6af94744c94929ed95 (patch) | |
| tree | 7ef7c9703827e1fae744bf8b6de28a80ac4c8367 | |
| parent | aebba1030a5766cdf894ed4ab0cac7aed5aee9c1 (diff) | |
arm64: dts: mediatek: mt7981: add I2C controller
MT7981 has one on-SoC I2C controller that differs from recent Mediatek
blocks by having a different SLAVE_ADDR register offset (thus a custom
binding compatible string).
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi index 0fc7c6d33d72..64aeeb24efac 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -94,6 +94,21 @@ #pwm-cells = <2>; }; + i2c@11007000 { + compatible = "mediatek,mt7981-i2c"; + reg = <0 0x11007000 0 0x1000>, + <0 0x10217080 0 0x80>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&infracfg CLK_INFRA_I2C0_CK>, + <&infracfg CLK_INFRA_AP_DMA_CK>, + <&infracfg CLK_INFRA_I2C_MCK_CK>, + <&infracfg CLK_INFRA_I2C_PCK_CK>; + clock-names = "main", "dma", "arb", "pmic"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + pio: pinctrl@11d00000 { compatible = "mediatek,mt7981-pinctrl"; reg = <0 0x11d00000 0 0x1000>, |